The present invention relates to a solid-state image pickup device suitable for a CCD solid-state image pickup device, typically, of a total pixel readout type, and a fabrication method thereof.
FIG. 17 shows an essential portion of an image pickup region of a conventional total pixel readout type CCD solid-state image pickup device. A CCD solid-state image pickup device 1 shown in FIG. 17, if being of an inter line transfer (IT) type, includes an image pickup region 4 and a horizontal transfer register having a CCD structure (not shown). The image pickup region 4 includes a plurality of light receiving portions 2 for photoelectric conversion, which portions are taken as pixels arranged in a matrix, and a plurality of vertical transfer registers 3 each of which has a CCD structure and which is formed on one side of each column of the light receiving portions 2. The horizontal transfer register is used for transferring signal charges transferred from the vertical transfer registers 3 to an output unit.
FIG. 18A is a sectional view taken on line A1—A1 of FIG. 17, and FIG. 18B is a sectional view taken on line B1—B1 of FIG. 17. Referring to FIGS. 18A and 18B, the vertical transfer register 3 has transfer electrodes having a three-layer structure formed on a transfer channel region of a silicon semiconductor base 6 via a gate insulating film 7. These transfer electrodes are composed of first transfer electrodes 8A formed by a first polysilicon layer, second transfer electrodes 8B formed by a second polysilicon layer, and third transfer electrodes 8C formed by a third polysilicon layer, which are repeatedly arranged along a charge transfer direction “a”. Reference numeral 9 designates an interlayer insulating film. Each of the first transfer electrodes 8A is formed into a band-shape extending in the horizontal direction in such a manner as to be common to a plurality of columns of the vertical transfer registers 3. The same is true for the second and third transfer electrodes 8B and 8C.
In the region between the light receiving portions 2 adjacent to each other in the vertical direction, the first, second, and third transfer electrodes 8A, 8B and 8C are sequentially stacked.
The solid-state image pickup device 1 is configured such that the transfer electrode 8 of the vertical transfer register 3 is divided into the three parts, that is, the first, second and third transfer electrodes 8A, 8B and 8C for each pixel (light receiving portion 2), and is three-phase driven for total pixel readout by applying three-phase vertical drive pulses φV1, φV2, and φV3 shown in FIG. 19 to these transfer electrodes 8A, 8B and 8C, respectively.
Another CCD solid-state image pickup device 11 having a configuration shown in FIG. 15 has been proposed. The device 11 is four-phase driven for total pixel readout by applying four-phase vertical drive pulses to transfer electrodes having a three-layer structure of each vertical transfer register.
FIG. 16A is a sectional view taken on line A2—A2 of FIG. 15. Referring to FIGS. 15 and 16A, the CCD solid-state image pickup device 11 is configured such that transfer electrodes 8 of a vertical transfer register 3 are formed by three polysilicon layers. To be more specific, second and fourth transfer electrodes 8B and 8D formed by the second polysilicon layer are alternately arranged along a charge transfer direction; each first transfer electrode 8A formed by the first polysilicon layer is disposed between the second and fourth transfer electrodes 8B and 8D arranged in this order, for example, from the left side in FIG. 16A; and each third transfer electrode 8C formed by the third polysilicon layer is disposed between the fourth and second transfer electrodes 8D and 8B arranged in this order, for example, from the left side in FIG. 16A.
FIG. 16B is a sectional view taken on line B2—B2 of FIG. 15. Referring to FIG. 16B, in the region between the light receiving portions 2 adjacent to each other in the vertical direction, the second and fourth transfer electrodes 8B and 8D formed by the second layer are stacked on the first transfer electrode 8A formed by the first layer, and the third transfer electrode 8C formed by the third layer is stacked on the second and fourth electrodes 8B and 8D.
The solid-state image pickup device 11 is configured such that the transfer electrode 8 of the vertical transfer register 3 is divided into the four parts, that is, the first, second, third, and fourth transfer electrodes 8A, 8B, 8C and 8D for each pixel (light receiving portion 2), and is four-phase driven for total pixel readout by applying four-phase vertical drive pulses φV1, φV2, φV3, and φV4 shown in FIG. 3 to these transfer electrodes 8A to 8D, respectively.
The other configuration is the same as that shown in FIG. 17 and FIGS. 18A and 18B, and therefore, corresponding parts are designated by the same characters and the overlapped explanation is omitted.
In the CCD solid-state image pickup device 1 shown in FIG. 17, since the vertical transfer register 3 is three-phase driven by the transfer electrode 8 divided into the three parts, that is, the first, second and third transfer electrodes 8A, 8B and 8C, the accumulated charge capacity in the vertical transfer register 3 is equivalent to one-third of the accumulated charge capacity in the vertical transfer path for one pixel. As a result, to ensure a sufficient accumulated charge capacity in the transfer portion, the width W1 of the transfer path must be broadened; however, if the width W1 of the transfer path is broadened, the area of the light receiving portion 2 is reduced in proportional to the broadened width W1.
The areas of the three transfer electrodes 8A to 8C divided from the transfer electrode 8 for each pixel may be desirable to be equalized to each other for ensuring a larger accumulated charge capacity; however, they actually become uneven largely depending on variations in processed line width among the transfer electrodes 8A to 8C. As a result, the accumulated charge capacity is determined by one of the transfer electrodes 8A to 8C having the smallest area, to thereby reduce the actual charge amount.
In the CCD solid-state image pickup device 11 shown in FIG. 15, which is four-phase driven for total pixel readout by the three-layer electrode structure, since the accumulated charge capacity is equivalent to two-fourth of the accumulated charge capacity in the vertical transfer path for one pixel, it becomes larger than that in the CCD solid-state image pickup device 1 shown in FIG. 17, which is three-phase driven for total pixel readout by the three-layer electrode structure.
The CCD solid-state image pickup device 11, however, has the following disadvantage: namely, a variation in line width occurs between the transfer electrode 8A formed by the first layer and each of the transfer electrodes 8B and 8D formed by the second layer and also a misalignment occurs between the transfer electrode 8A formed by the first layer and each of the transfer electrodes 8B and 8D formed by the second layer, so that variations occur among lengths L1, L2, L3 and L4 of the two-phase transfer regions each of which is composed of the adjacent transfer electrodes for two-phases and is taken as a factor determining the accumulated charge capacity, to thereby reduce the actual charge amount.